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Designers Corner with Prof. Mike Smith  Part 1

Picking the right software and tools

In order to build the MAC core, which would be in the FPGA attached to the PHY chip in our final design, we needed to be able to test it. To test the core we needed control over the packets being sent to and received from the Level One chip. This is not easy because normally the operating system (Windows, for example) takes care of the device level drivers. Suppose, for example, we wish to check that the error checking is working. How do we generate packets with known errors? The operating system won’t let us do that. Fortunately we found another evaluation NIC from SMSC (which did not use the Level One chip, that would have been too easy). SMSC provides as part of their website technical support a large C program that drives the PHY chip on their evaluation NIC directly, bypassing device drivers and the OS.



Our network test setup. We stripped two old PCs so we could get to the network cards. We used the Level One evaluation board in one PC and an evaluation NIC from SMSC in the other PC. SMSC provides low-level software, bypassing the device drivers, so we could control the network traffic between the two PCs at the packet level.

At the bit level we used an HP Logic Analyzer to grab packets on our test network. In order to trace what was happening at the packet level we needed the right snooping software. We searched and tried many different programs before settling on LANSleuth (http://www.lansleuth.com/). Hamish also wrote custom scripts to pipe text through Unix utilities that would place packets with known structure on the network.

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